UC San Diego Chip Design Could Slash Data Center Power Waste for GPU Workloads

UC San Diego Chip Could Slash Data Center Power Waste

Researchers at UC San Diego published a new chip design in Nature Communications on April 9, 2026. The chip rethinks how power is converted for GPUs in data centers, using vibrating piezoelectric components instead of traditional magnetic-field-based converters.

How It Works

The chip combines piezoelectric resonators with a circuit layout that stores and transfers energy through mechanical vibrations rather than magnetic fields. The researchers tested it on a common data center task: converting 48 volts down to 4.8 volts, a level used by GPU hardware.

Performance

The prototype reached 96.2% peak efficiency and delivered about 4x more output current than earlier piezoelectric-based converters. Traditional power converters in data centers typically lose significant energy as heat during voltage conversion.

Current Limitations

The design is still at the research stage. Piezoelectric resonators physically vibrate during operation. They cannot be soldered onto circuit boards using standard techniques without risking damage. New integration methods are needed before commercial deployment.

Why It Matters

Data centers consumed an estimated 4.4% of total US electricity in 2024, and that share is growing fast as AI workloads scale. Power conversion is a major source of waste in these facilities. A chip that cuts conversion losses could meaningfully reduce the energy cost of running AI infrastructure at scale.